Senior Staff Electrical Engineer

CHAOS Industries is redefining modern defense with a multi-product portfolio that gives the ultimate advantage—domain dominance. The company's products are powered by Coherent Distributed Networks (CDN™), empowering warfighters, commercial air operators, and border protection teams to act faster, adapt rapidly, and stay ahead of evolving threats. 

CHAOS Industries was founded in 2022 and has raised a total of $1 billion in funding from leading investors, including 8VC, Accel, and Valor Equity Partners. The company is headquartered in Los Angeles, with offices in Washington, D.C., San Francisco, San Diego, Seattle, and London. For more information, please visit www.chaosinc.com .

Role Overview:  

CHAOS is seeking a Senior Staff Electrical Engineer with expertise in digital circuit design and signal integrity analysis to provide senior technical leadership for high-reliability digital electronics used in aerospace and military applications. This role spans the full product lifecycle, from early architecture and requirements shaping through detailed design, analysis, verification, production support, and fielded system sustainment.  

The ideal candidate is an experienced digital hardware technical leader with deep high-speed board design, signal integrity, and power integrity expertise; a track record of leading complex designs and influencing technical direction; and the ability to guide cross-disciplinary teams through ambiguous, high-consequence hardware challenges.  

This is a full-time, on-site position in El Segundo, CA.  

 
Responsibilities:  

• Lead the design and technical execution of high-speed digital circuit cards and subsystems in accordance with customer requirements, applicable aerospace and military standards, and internal design practices  

• Lead design and review of complex PCBAs involving FPGAs, processors, memory devices, data converters, clocks, high-speed serial interfaces, and mixed-signal boundaries  

• Lead digital hardware architecture trades and define design approaches that balance system performance, schedule, manufacturability, reliability, and qualification requirements  

• Develop and promote design practices for digital board design, stack-up definition, layout constraints, SI/PI analysis, bring-up, and verification within assigned product areas  

• Resolve complex cross-disciplinary technical issues involving digital hardware, FPGA/software interfaces, RF coexistence, power distribution, EMI/EMC, thermal behavior, and mechanical packaging  

• Define and review PCB layout strategy for controlled impedance, length matching, return paths, grounding, shielding, decoupling, power distribution networks, and isolation of sensitive circuits  

• Serve as a senior technical interface with customers, vendors, suppliers, and internal program leadership for digital hardware topics  

• Mentor engineers and coordinate technical activities across digital, FPGA, embedded software, RF, power, mechanical, manufacturing, and test teams  

• Lead or provide technical direction for hardware integration, verification, qualification testing, production transition, failure analysis, and field support  

Minimum Requirements:  

• Bachelor's degree in Electrical Engineering with 12+ years of relevant engineering experience  

• Demonstrated technical leadership of complex high-speed digital hardware designs  

• Strong understanding of digital design fundamentals, including timing, clocking, controlled impedance, signal integrity, power integrity, grounding, decoupling, and return-path management  

• Extensive experience with digital board design involving FPGAs, processors, memory devices, high-speed data converters, and board-level communication interfaces  

• Experience defining or reviewing PCB layout strategy, design constraints, and analysis criteria for high-speed digital, mixed-signal, and high-reliability electronics  

• Hands-on experience leading or supporting board bring-up, system integration, troubleshooting, verification, qualification, production transition, and failure analysis activities  

• Demonstrated ability to lead technical execution and mentor engineers through ambiguous, cross-disciplinary hardware challenges  

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